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DATA SHEET
TFT COLOR LCD MODULE
NL10276AC30-03
38 cm (15.0 inches), 1024 x 768 pixels, FULL-COLOR, MULTI-SCAN FUNCTION Wide viewing angle
DESCRIPTION
NL10276AC30-03 is a TFT(thin film transistor) active matrix color liquid crystal display (LCD) comprising amorphous silicon TFT attached to each signal electrode, a driving circuit and a backlight. NL10276AC30-03 has a built-in backlight with an inverter. The 38cm (15.0 inches) diagonal display area contains 1024 x 768 pixels and can display full-color (more than 16 million colors simultaneously). Also, it has multi-scan function.
FEATURES
* High luminance * Low reflection * Wide viewing angle (with Retardation Film) * Analog RGB signals * Multi-scan function: e.g., XGA, SVGA, VGA, VGA-TEXT, PC-9801, MAC * Incorporated edge type backlight (Two lamps, Inverter) * Lamp holder replaceable (Part No. 150LHS03)
APPLICATIONS
* Desk-top type of PC * Engineering work station Regarding the use of OSD, please note that there is possibility of conflicts with a patent in Europe and the U.S. Thus, if such conflict might happen when you use OSD, we shall not be responsible for any trouble.
Document No. EN0416EJ1V0DS00 (1st edition) Date Published January 1999 P Printed in Japan
(c)
1999
NL10276AC30-03
STRUCTURE AND FUNCTIONS A color TFT (thin film transistor) LCD module is comprised of a TFT liquid crystal panel structure, LSIs for driving the TFT array, and a backlight assembly. The TFT panel structure is created by sandwiching liquid crystal material in the narrow gap between a TFT array glass substrate and a color filter glass substrate. After the driver LSIs are connected to the panel, the backlight assembly is attached to the backside of the panel. RGB (red, green, blue) data signals from a source system is modulated into a form suitable for active matrix addressing by the onboard signal processor and sent to the driver LSIs which in turn addresses the individual TFT cells. Acting as an electro-optical switch, each TFT cell regulates light transmission from the backlight assembly when activated by the data source. By regulating the amount of light passing through the array of red, green, and blue dots, color images are created with clarity. OUTLINE OF CHARACTERISTICS (at room temperature) Display area Drive system Display colors Number of pixels Pixel arrangement Pixel pitch Module size Weight Contrast ratio 304.128 (H) x 228.096 (V) mm a-Si TFT active matrix. Full-color 1024 x 768 RGB vertical stripe 0.297 (H) x 0.297 (V) mm 350.0 (H) x 265.0 (V) x 20.0 (D) mm 1400 g (typ.) 200:1 (typ., perpendicular) * Horizontal : 55 (typ., left side, right side) * Vertical Designed viewing direction * Wider viewing angle with contrast ratio * Optimum grayscale ( = 2.2) Color gamut Response time Luminance Signal system Supply voltage Backlight 42 % (typ., At center, To NTSC) 15 ms (typ.), "white" to "black" 200 cd/m2 (typ.) Analog RGB signals, Synchronous signals (Hsync and Vsync), CLK 12 V, 12 V (Logic/LCD driving, Backlight) Edge light type: Two cold cathode fluorescent lamps with an inverter [Replaceable parts] * Lamp holder : 150LHS03 * Inverter Power consumption 15.6 W (typ.) : 150PW031 : Down side (6 o'clock) : perpendicular * Wider viewing angle without image reversal : up side (12 o'clock) : 50 (typ., up side), 45 (typ, down side)
Viewing angle (more than the contrast ratio of 10:1)
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
BLOCK DIAGRAM
I/F LCD module
R G B AIF AMP
Hsync Vsync CLK DESEL CLAMP CPSEL CNTDAT CNTCLK CNTSTB CNTSEL OSDENI OSDRI OSDGI OSDBI ADJSEL CNTSTB2
Timing controller
H-driver
3072 lines POWC VDD ON/OFF LCD panel 768 lines V-driver DC/DC converter H : 1024 x 3 (R, G, B) V : 768
VDDB BRTC BRTH BRTL ACA BRTP PWSEL GNDB
Inverter
Backlight
GND
Note Frame is not connected to GND and GNDB.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
SPECIFICATIONS GENERAL SPECIFICATIONS
Item Module size Display area Number of dots Pixel pitch Dot pitch Pixel arrangement Display colors Weight Contents 350.0 0.6 (H) x 265.0 0.6 (V) x 20.5 (max.) (D) 304.128 (H) x 228.096 (V) 1024 x 3 (H) x 768 (V) 0.297 (H) x 0.297 (V) 0.099 (H) x 0.297 (V) RGB (Red, Green, Blue) vertical stripe Full color 1500 (max.) Unit mm mm dots mm mm - color g
ABSOLUTE MAXIMUM RATINGS
Parameter Supply voltage Symbol VDD VDDB Logic input voltage R, G, B input voltage CLK input voltage BRTL input voltage Storage temp. Operating temp. Humidity (no condensation) Vin1 Vin 2 Vin 3 Vin 4 Tst Top Rating -0.3 to +14 -0.3 to +14 -0.3 to +5.5 -6.0 to +6.0 -7.0 to +7.0 -0.3 to +1.5 -20 to + 60 0 to +50 95% relative humidity 85% relative humidity Absolute humidity shall not exceed Ta = 50C, 85% relative humidity level. Unit V V V V V V C C Module surface Ta 40C 40 < Ta 50C Ta > 50C - Note Ta = 25C VDD = 12 V Ta = 25C Remarks
Note Measured at the display area
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
ELECTRICAL CHARACTERISTICS (1) Logic, LCD driving, Backlight (Ta = 25C)
Item Supply voltage Symbol VDD VDDB Logic input "L" voltage 1 Logic input "H" voltage 1 Logic input "L" voltage 2 Logic input "H" voltage 2 Input CLK voltage Input DC voltage level Logic input "L" current 1 Logic input "H" current 1 Logic input "L" current 2 Logic input "H" current 2 Logic input "L" current 3 Logic input "H" current 3 Logic input "L" current 4 Logic input "H" current 4 Logic input "L" current 5 Logic input "H" current 5 Supply current VIL1 VIH1 VIL2 VIH2 VICLK VIDCCLK IIL1 IIH1 IIL2 IIH2 IIL3 IIH3 IIL4 IIH4 IIL5 IIH5 IDD IDDB Min. 11.4 11.4 0 4.5 0 2.2 0.6 -4.5 -10 - -1400 - -1.0 - -1.0 - -10 - - - Typ. 12.0 12.0 - - - - - - - - - - - - - - - - 550 750 Max. 12.6 12.6 0.6 5.25 0.8 5.25 1.0 +4.5 - 160 - 10 - 0.8 - 10 - 10 800 850 Unit V V V V V V Vp-p V CLK Logic except BRTP Remarks for Logic and LCD driving for backlight for BRTP
A A A A
mA mA mA mA
Hsync, Vsync
CNTSEL, CPSEL, POWC, ADJSEL
BRTC, BRTL, ACA, PWSEL
BRTP
A A
mA mA
Logic except inputs above
VDD = 12.0 V VDDB = 12.0 V (Max. luminance)
Note
Note Pixel checkered pattern (2) Video signal (R, G, B) input (Ta = 25C)
Item Maximum amplitude (white - black) Min. 0 (black) -3.5 Typ. 0.7 (white) - Max. 0.9 Unit Vp-p Remarks Contrast adjustment is needed if the amplitude exceeds 0.7 Vp-p. -
DC input level (black)
+3.5
V
(3) CLK input equivalent circuit
1000 pF CLK 510
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
SUPPLY VOLTAGE SEQUENCE (1) Sequence of power supply
Logic signals
Voltage
Note
POWC VDD
Time 200 ms 30 ms 0 ms < 0 ms <
Note Synchronous signals, Control signals, CLK.
CAUTION Wrong power sequence may cause damage to the module.
a)
Logic signals (synchronous signals and control signals) should be "0" voltage (V), when VDD is not input. If higher than 0.3 V is input to signal lines, the internal circuit will be damaged.
b)
LCD module will shut down the power supply of driving voltage to LCD panel internally when one of CLK, Hsync, Vsync is not input more than 90 ms typically. As the display data are unstable in this period, the display is disordered. But the backlight works correctly even in this period. So the backlight ON/OFF should be controlled by BRTC signal.
c)
The backlight ON/OFF (BRTC signal) should be controlled while logic signals are supplied. The backlight power supply (VDDB) is not related to the power supply sequence. However, unstable data is displayed when the backlight power is turned ON without logic signals.
d)
Keep POWC signal "L" more than 200 ms after the power supply (VDDB) is input, if POWC signal is controlled.
e) f)
Analog RGB input are independent of this power supply sequence. 12 V for backlight should be started up within 80 ms, otherwise the protection circuit makes the backlight turn off.
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
(2) Ripple of supply voltage Please note that the ripple at the input connector of the module should be within the values shown in this table. If the ripple is beyond these values, the noise may appear on the screen.
VDD (for logic and LCD driver) Acceptable range 100 mVp-p VDDB (for backlight) 200 mVp-p
Note The acceptable range of ripple voltage includes spike noise. Examples of the power supply connection a) Separate the power supply
Power Power VDD VDDB Power
b) Put the filter
Filter VDD
Filter
VDDB
(3) Inverter current wave In the luminance control mode, the rush current below flows into the inverter of the module. The duty cycle varies from 100% through 20% depending on the luminance control level. This might cause the noise on the screen. Please evaluate the appropriate value of the capacitor in the filter to eliminate the noise.
Filter Inverter circuit of NL10276AC30-03
Customer's Power supply (12 V)
to VDD
Rush current 750 (mA)
GND 0 (A) Duty Frequency*
* Frequency: Vsync frequency x K* * Vsync 75 Hz: K = 4.6 > 75 Hz: K = 3.6
Data Sheet EN0416EJ1V0DS00
7
NL10276AC30-03
INTERFACE PIN CONNECTION (1) CN1 Part No. : MRF03-6R-SMT MRF-03-6P-0.8D (cable type) MRF-03-6P-1.27 (cable type) Supplier
Pin No. 1 2 3
Adaptable socket: MRF03-6PR-SMT (board-to-board type)
: HIROSE ELECTRIC CO., LTD.
Symbol B G R Pin No. 4 5 6 Symbol Vsync Hsync CLK
1 2 ****** 5 6
Figure from socket view
(2) CN3 Part No. Supplier
Pin No. 1 2 3 4 5 6 7 8
: IL-Z-15PL-SMTY : Japan Aviation Electronics Industry Limited (JAE)
Symbol VDD VDD GND GND POWC CNTSEL CNTDAT CNTSTB Pin No. 9 10 11 12 13 14 15 Symbol GND CNTCLK CPSEL CLAMP GND N.C. GND
15 14 * * * * 2 1
Adaptable socket: IL-Z-15S-S125C3
Figure from socket view
Note N.C. (No connection) should be open.
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
(3) CN3 Part No. Supplier
Pin No. 1 2 3 4 5 6 7 8 9 10
: DF14A-20P-1.25H : HIROSE ELECTRIC CO., LTD
Symbol GND OSDENI GND OSDBI GND OSDGI GND OSDRI GND N.C. Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol ADJSEL N.C. CNTSTB2 GND N.C. GND N.C. N.C. N.C. N.C.
1 2* * * * 19 20
Adaptable socket: DF14-20S-1.25C
Figure from socket view
Note N.C. (No connection) should be open. (4) CN201 Part No. Supplier
Pin No. 1 2 3 4 5 6
: IL-Z-11PLI-SMTY : Japan Aviation Electronics Industry Limited (JAE)
Symbol VDDB VDDB VDDB GNDB GNDB GNDB Pin No. 7 8 9 10 11 Symbol ACA BRTC BRTH BRTL N.C.
11 10 * * * * 2 1
Adaptable socket: IL-Z-11S-S125C3
Figure from socket view
(5) CN202 Part No. Supplier
Pin No. 1 2 3 4 5
: IL-Z-9PL1-SMTY : Japan Aviation Electronics Industry Limited (JAE)
Symbol GNDB GNDB ACA BRTC BRTH Pin No. 6 7 8 9 Symbol BRTL BRTP GNDB PWSEL
9 8 * * * * 2 1
Adaptable socket: IL-Z-9S-S125C3
Figure from socket view
Note N.C. (No connection) should be open.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
Caution For CN201 and CN202, pins with an identical symbol are connected inside the module. Do not use both of these pins at the same time.
1 CN1 1 9 1 11 1 1 CN4 20 CN201 15 CN3 CN202 6
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
PIN FUNCTION (1/2)
Symbol CLK Hsync Vsync R G B POWC I/O Input Input Input Input Input Input Input Logic Positive Negative Negative - - - Positive Description Dot clock input. (ECL level) This timing-signal is for display data. Horizontal synchronous signal input (TTL level) Vertical synchronous signal input (TTL level) Red video signal input (0.7 Vp-p, 75 ) Green video signal input (0.7 Vp-p, 75 ) Blue video signal input (0.7 Vp-p, 75 ) Power control signal (TTL level) "H" or "Open": Logic and LCD power are on. "L" : Logic and LCD power are off. When POWC is "L", serial communication data is cleared. Please set again. Display control signal in case of serial communications. (TTL level) "H" or "Open" : Default , "L" : External control External control is set up by serial communication. Display control data (TTL level) Detail of CNTDAT is mentioned in FUNCTIONS. CLK for display control data (TTL level) Detail of CNTCLK is mentioned in FUNCTIONS. Latch pulse for display control data (TTL level) Detail of CNTSTB is mentioned in FUNCTIONS. CLAMP function select signal "H" or "Open": Default , "L" : External control Clamp timing signal of black level (TTL level) This mode works when CPSEL = "L". Contrast, brightness select control signal (TTL level) "H" or "Open": Default , "L" : External control Latch pulse2 for display control data Detail of CNTSTB2 is mentioned in FUNCTIONS Input OSD-R data Detail is mentioned in OSD FUNCTIONS Input OSD-G data Detail is mentioned in OSD FUNCTIONS Input OSD-B data Detail is mentioned in OSD FUNCTIONS Enable signal for OSD Detail is mentioned in OSD FUNCTIONS
CNTSEL
Input
-
CNTDAT
Input
Positive
CNTCLK
Input
Positive
CNTSTB
Input
Positive
CPSEL
Input
-
CLAMP
Input
Negative
ADJSEL
Input
Positive
CNTSTB2
Input
Positive
OSDRI
Input
-
OSDGI
Input
-
OSDBI
Input
-
OSDENI
Input
Positive
Data Sheet EN0416EJ1V0DS00
11
NL10276AC30-03
(2/2)
Symbol ACA I/O Input Logic Positive Description Luminance control signal (TTL level) "H" or "Open": Normal luminance "L" : Low luminance (1/2 of normal luminance) Backlight ON/OFF control signal (TTL level) "H" or "Open" : Backlight ON, "L" : Backlight OFF Variable resistor control of Voltage control See [Function select] for detail. Luminance control signal Select the control of luminance (TTL level) See [Function select] for detail. Power supply for Logic and LCD driving +12 V (5 %) Power supply for backlight. +12 V (5 %) Signal ground for Logic and LCD driving (Connect to system ground) Ground for backlight, GNDB is not connected to the frame ground of LCD module.
BRTC
Input
Positive
BRTH BRTL BRTP PWSEL
Input
-
Input Input
- Positive
VDD VDDB GND GNDB
- - - -
- - - -
Note Frame ground, system ground (GND) and backlight ground (GNDB) are not connected in the module. [Function select]
BRTP Valid PWSEL "L" How to adjust Luminance can be controlled by BRTP signal. See OUTSIDE CONTROL FOR LUMINANCE for more detail. Volume Voltage Please connect BRTP and BRTL. Fix BRTH to "0 V" and input proper voltage to BRTL. 1 V: maximum luminance (100%) 0 V: minimum luminance (20%) Note
Open
"H" or "Open"
Note The variable resistor for luminance control should be 10 k type, and zero point of the resistor correspond to the minimum of luminance.
BRTH R
BRTL
Mating variable resistor: 10 K 5 %, B curve
Maximum luminance (100 %) : R = 10 K Minimum luminance (20 %) : R = 0
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
FUNCTIONS This LCD module has following functions controled by serial data input (table 1) (1) Control Display position (VERTICAL) (3) Control CLK delay (4) Change CLK fall/rise synchronous (5) Contrast control (6) Sub-Contrast control (7) Sub-Brightness control : See table 3 : See table 4 : See table 5 : : : See table 9, 10 and COLOR CONTROL FUNCTION AND GRAPH IMAGE (2) Control Display position (HORIZONTAL) : See table 6
Set up the following items to work the functions above (A) Expansion mode (B) CLK counts of horizontal period (C) CLK frequency range HOW TO USE THE FUNCTIONS ABOVE When CNTSEL is "L", the functions ((1)-(4), (A)-(C)) above are valid. (When CNTSEL is "H" or open, default values are valid.) After serial data are transferred, they are latched by CNTSTB. Once the data is latched, the functions (1)-(4), (A)-(C) are effective. When ADJSEL is "L", functions (5)-(7) are valid. (When ADJSEL is "H" or open, default values are valid.) After serial data are transferred, they are latched by CNTSTB2. Once the data is latched, the functions (5)-(7) are effective. Keep CNTSTB/CNTSTB2 "L" while transferring data. Changing data is allowed when power is on. But display may be disturbed while changing. Turning off backlight using BRTC function is recommended in this period. : See table 2 and EXPANSION FUNCTION : See table 7 : See table 8
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
SERIAL COMMUNICATION TIMING AND WAVEFORM
CNTDAT CNTCLK CNTSTB CNTSTB2 INVALID D0 D1 D44 INVALID AD0 AD1 AD11
Parameter CLK pulse-width CLK frequency DATA set-up-time DATA hold-time Latch pulse-width Latch set-up-time Rise / fall time
Symbol Twck Fclk Tdst Tdhl Twlp Tlst Tr, Tf
Min. 50 - 50 50 50 50 -
Max. - 5 - - - - 50
Unit ns MHz ns ns ns ns ns CNTXXX CNTDAT CNTCLK
Remark
CNTSTB, CNTSTB2
SERIAL COMMUNICATION WAVEFORM
VIH CNTDAT Tdst Tdhl Twch CNTCLK 50 % 10 % Tr T1st CNTSTB CNTSTB2 90 % VIH VIL Tf Twlp VIH 50 % VIL 50 % VIL
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
Table 1. CNTDAT Composition (1/2)
DATA D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 DATA name VEX3 VEX2 VEX1 VEX0 VD10 VD9 VD8 VD7 VD6 VD5 VD4 VD3 VD2 VD1 VD0 DELAY6 DELAY5 DELAY4 DELAY3 DELAY2 DELAY1 DELAY0 CKS HD8 HD7 HD6 HD5 HD4 HD3 HD2 HD1 HD0 HSE10 HSE9 HSE8 HSE7 HSE6 HSE5 HSE4 HSE3 Expansion mode Expansion mode Expansion mode Expansion mode Vertical display position (MSB) Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position (LSB) CLK delay (MSB) CLK delay CLK delay CLK delay CLK delay CLK delay CLK delay (LSB) CLK reverse signal Horizontal display position (MSB) Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position (LSB) CLK count of horizontal period (MSB) CLK count of horizontal period CLK count of horizontal period CLK count of horizontal period CLK count of horizontal period CLK count of horizontal period CLK count of horizontal period CLK count of horizontal period See table 7 See table 5 See table 6 See table 4 See table 3 Function See table 2
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
Table 1. CNTDAT Composition (continuation) (2/2)
DATA D40 D41 D42 D43 D44 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 DATA name HSE2 HSE1 HSE0 MOD1 MOD0 DAA0 DAA1 DAA2 DAA3 DAD7 DAD6 DAD5 DAD4 DAD3 DAD2 DAD1 DAD0 CLK count of horizontal period CLK count of horizontal period CLK count of horizontal period (LSB) CLK frequency select CLK frequency select Color adjust select data (LSB) Color adjust select data Color adjust select data Color adjust select data (MSB) Color adjust data (MSB) Color adjust data Color adjust data Color adjust data Color adjust data Color adjust data Color adjust data Color adjust data (LSB) See table 9 See table 10 See table 8 Function See table 7
Table 2. Display Mode (VEX3 to VEX0: 4 bit)
Vertical magnification 1 1.25 1.6 - - - - - - 1.2 - - - - - -
VEX3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
VEX2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
VEX1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
VEX0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Display mode XGA SVGA PC98, VGA, TEXT Prohibit Prohibit Prohibit Prohibit Prohibit Prohibit 832 x 624 (MAC) Prohibit Prohibit Prohibit Prohibit Prohibit Prohibit Standard
Display image Note
See DISPLAY IMAGE
Note When CNTSEL is "H" or "Open", display mode is fixed to XGA.
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
Table 3. Vertical Position (VD10 to VD0: 11 bit)
VD10 0 0 0 0 0 0 * * * 1 1 1 VD9 0 0 0 0 0 0 * * * 1 1 1 VD8 0 0 0 0 0 0 * * * 1 1 1 VD7 0 0 0 0 0 0 * * * 1 1 1 VD6 0 0 0 0 0 0 * * * 1 1 1 VD5 0 0 0 0 0 0 * * * 1 1 1 VD4 0 0 0 0 0 0 * * * 1 1 1 VD3 0 0 0 0 0 0 * * * 1 1 1 VD2 0 0 0 0 1 1 * * * 1 1 1 VD1 0 0 1 1 0 0 * * * 0 1 1 VD0 0 1 0 1 0 1 * * * 1 0 1 V ertical position [H] Note 1 Prohibit Prohibit Prohibit Prohibit 4 5 * * * 2045 2046 2047 Note 2
Notes 1. Horizontal line number for effective VIDEO signal from Vsync-fall is shown in this column. 2. The maximum vertical position is Vsync total. 3. When CNTSEL is "H" or "Open", vertical position is fixed to 35 [H].
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
Table 4. CLK Delay (DELAY6 to DELAY0: 7 bit)
DELAY [6..0] 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2AH Delay 9.5 9.8 10.0 10.3 10.5 10.8 11.0 11.3 11.5 11.8 12.1 12.3 12.5 12.8 13.1 13.3 13.6 13.8 14.1 14.4 14.6 14.9 15.1 15.4 15.7 16.0 16.2 16.5 16.7 17.0 17.2 17.5 17.7 18.0 18.3 18.5 18.8 19.0 19.3 19.6 19.9 20.2 20.4 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns DELAY [6..0] 2BH 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4AH 4BH 4CH 4DH 4EH 4FH 50H 51H 52H 53H 54H 55H Delay 20.7 20.9 21.2 21.4 21.7 22.0 22.2 22.58 22.8 23.0 23.3 23.5 23.8 24.1 24.3 24.6 24.9 25.1 25.4 25.6 25.9 26.2 26.5 26.7 27.0 27.2 27.5 27.7 28.0 28.3 28.6 28.9 29.1 29.4 29.6 29.9 30.1 30.4 30.7 31.0 31.2 31.4 31.7 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns DELAY [6..0] 56H 57H 58H 59H 5AH 5BH 5CH 5DH 5EH 5FH 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6AH 6BH 6CH 6DH 6EH 6FH 70H 71H 72H 73H 74H 75H 76H 77H 78H 79H 7AH 7BH 7CH 7DH 7EH 7FH Delay 32.0 32.2 32.6 32.9 33.1 33.4 33.6 33.8 34.1 34.4 34.7 34.9 35.2 35.4 35.7 36.0 36.2 36.4 36.7 37.0 37.3 37.5 37.7 38.0 38.2 38.5 38.7 39.0 39.3 39.5 39.7 40.0 40.3 40.5 40.8 41.1 41.4 41.6 41.9 42.1 42.4 42.6 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
Notes 1, When CNTSEL is "H" or "Open", DELAY[6..0] is fixed to 00H. delay. Please set up a preferable display position. See the following references. <1> Variation of CLK delay by temperature drift (for reference). The temperature constant of CLK delay is 0.2 %/C. Calculated example: In case of delay time is 20 ns at Ta = 25C; (a) In case Ta rising to 50C. Increase of delay time (50C - 25C) x 0.002 x 20 ns = +1 ns So, the total delay time is 21 ns at Ta = 50C. (b) In case Ta falling to 0C. Decrease of delay time (0C - 25C) x 0.002 x 20 ns = -1 ns So, the total delay time is 19 ns at Ta = 0C. <2> Variation of CLK delay time between each LCD module (for reference). -10.5 % to +14.4 %
MOD setting 0,0 The upper limit of CLK delay: DELAY [6..0] Prohibit 0,1 59H 1,0 6BH 1,1 7FH
2. These values are typical at Ta = 25C. Changing ambient temperature or power supply change the
Table 5. CLK Reverse Signal
CKS 0 DATA are sampled on rising edge of CLK Function
1
DATA are sampled on falling edge of CLK
Note When CNTSEL is "H" or "Open", CKS is assumed to be "0".
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
Table 6. Display Horizontal Position (HD8 to HD0: 9 bits)
HD8 0 0 * * 0 0 0 * * 1 1 1 HD7 0 0 * * 0 0 0 * * 1 1 1 HD6 0 0 * * 0 1 1 * * 1 1 1 HD5 0 0 * * 1 0 0 * * 1 1 1 HD4 0 0 * * 1 0 0 * * 1 1 1 HD3 0 0 * * 1 0 0 * * 1 1 1 HD2 0 0 * * 1 0 0 * * 1 1 1 HD1 0 0 * * 1 0 0 * * 0 1 1 HD0 0 1 * * 1 0 1 * * 1 0 1 Horizontal position [CLK] Note 1 Prohibit Prohibit * * Prohibit 64 65 * * 509 510 511
Notes 1. Number of CLKs from Hsync-fall to effective VIDEO signal is shown here. 2. When CNTSEL is "H" or "Open", Horizontal position is set to 296 [CLK]. Table 7. CLK Count of Horizontal Period (HSE10 to HSE0: 11 bit)
HSE10 0 0 * * * 1 1 1 HSE 9 0 0 * * * 1 1 1 HSE 8 0 0 * * * 1 1 1 HSE 7 0 0 * * * 1 1 1 HSE 6 0 0 * * * 1 1 1 HSE 5 0 0 * * * 1 1 1 HSE 4 0 0 * * * 1 1 1 HSE 3 0 0 * * * 1 1 1 HSE 2 0 0 * * * 1 1 1 HSE 1 0 0 * * * 0 1 1 HSE 0 0 1 * * * 1 0 1 CLK count Note 1 0 1 * * * 2045 2046 2047
Notes 1. Number of CLKs from Hsync to next Hsync. 2. When CNTSEL is "H" or "Open", CLK count is set to 1344 [CLK]. 3. Selected CLK count must be identical with that of input signal. Table 8. CLK Frequency Select (MOD1 to MOD0: 2 bit)
MOD1 0 0 1 1 MOD0 0 1 0 1 CLK frequency [MHz] Prohibit 65 to 80 50 to 65 20 to 50
Notes 1. Set up MOD1 and MOD0 complying with input CLK frequency. 2. When CNTSEL is "H" or "Open", CLK frequency is set to 65 - 80 MHz.
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
Table 9. Color Control Data (DAD7 to DAD0: 8 bit)
DAD7 0 0 * * 0 1 1 * * 1 1 1 DAD6 0 0 * * 1 0 0 * * 1 1 1 DAD5 0 0 * * 1 0 0 * * 1 1 1 DAD4 0 0 * * 1 0 0 * * 1 1 1 DAD3 0 0 * * 1 0 0 * * 1 1 1 DAD2 0 0 * * 1 0 0 * * 1 1 1 DAD1 0 0 * * 1 0 0 * * 0 1 1 DAD0 0 1 * * 1 0 1 * * 1 0 1 D/A 0 1 * * 127 128 129 * * 253 254 255 Note 1
Notes 1. Value for the function selected according to table 10. 2. Valid range of D/A depends on the selected function. 3. See Color control function and graph image for more detail. Table 10. Color Adjust Select Data (DAA3 to DAA0: 4 bit)
DAA3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 DAA2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 DAA1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 DAD0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Function Prohibit Main contrast Prohibit Prohibit Sub-contrast R Sub-contrast G Sub-contrast B Sub-brightness R Sub-brightness G Sub-brightness B Prohibit Prohibit Prohibit Prohibit Prohibit Prohibit
Note See more detail Color control function and graph image.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
EXPANSION FUNCTION HOW TO USE EXPANSION MODE Expansion mode is a function to expand screen. For example, VGA signal has 640 x 480 pixels. But, if the display data can expanded to 1.6 times vertically and horizontally, VGA screen image can be displayed fully on the screen of XGA resolution. This LCD module has the function of expanding vertical direction as shown in Table 1. And expanding horizontal direction is possible by setting input CLK frequency which is equivalent to the magnification. It is necessary to make this CLK outside of this LCD module. The below image is display example, HD and VD is set to most suitable frequency. Please adopt this mode after evaluating display quality, because the appearance of expansion mode is happened to become bad some cases. The followings show display magnifications for each mode.
Magnification Input display XGA SVGA VGA VGA text PC9801 MAC Number of pixels Vertical 1024 x 768 800 x 600 640 x 480 720 x 400 640 x 400 832 x 624 1 1.25 1.6 1.6 1.6 1.2 Horizontal 1 1.25 1.6 1.4 1.6 1.2 Note
Note The horizontal magnification multiples the input clock (CLK). Input CLK = system CLK x horizontal magnification Example In case of XGA and VGA, CLK frequency can be decided as follows. XGA: (system CLK (65 MHz)) x 1.0 = 65 MHz VGA: (system CLK (25.175 MHz)) x 1.6 = 40.28 MHz
22
Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
SETTING SERIAL DATA
Input signal Horizontal System CLK [MHz] Hsync [kHz] Vsync [Hz] Count Number [CLK] (A) 65 75 78.75 57.283 48.363 56.476 60.023 49.725 60.004 70.069 75.029 74.5 1344 1328 1312 1152 DSP* Note 1 [CLK] (B) 296 280 272 288 Vertical Count Number [H] - 806 806 800 667 DSP* Note 1 [H] (C) 35 35 31 42 Module serial data setting HSE HD VD
Mode
Calculation formula (A) x Ver.mag. (A) x 1 (B) x Hor.mag. (B) x 1
= (C) = (C)
XGA (1024 x 768) MAC (832 x 624) SVGA (800 x 600)
(A) x 1.2 (A) x 1.25
(B) x 1.2 (B) x 1.25
36* 40* 50* 49.5* 25.175* 31.5* 31.5* 30.24* 28.322* 31.5* 21.053*
35.156 37.879 48.077 46.875 31.469 37.861 37.5 35.0 31.469 37.927 24.827
56.25 60.317 72.188 75 59.94 72.809 75 66.667 70.087 85.039 56.432
1024 1056 1040 1056 800 832 840 864 900 936 848
200 216 184 240 144 168 184 160 153 180 144
625 628 666 666 525 520 500 525 449 446 440
24 27 29 24 35 31 19 42 37 45 33
VGA (640 x 480)
(A) x 1.6
(B) x 1.6
VGA text (720 x 400) PC9801 (640 x 400)
(A) x 1.4 (A) x 1.6
(B) x 1.4 (A) x 1.6
443
Notes 1. DSP = Display Start Period. DSP is total of "pulse-width" and "back-porch". 2. HD and VD are approximate value. Set HD and VD in case of adjusting display to the screen center. 3. The pulse-width of Hsync, Vsync and back-porch are the same as XGA-mode. (Standard-mode). 4. HSE see CLK number of table 7. 5. HD see horizontal position of table 6. 6. VD see vertical position of table 3.
Data Sheet EN0416EJ1V0DS00
23
NL10276AC30-03
DISPLAY IMAGE 1) SVGA mode (800 x 600)
XGA (1024 x 768)
Black display area
Horizontal : x 1.25 (1000 pixels) Vertical : x 1.25 (750 pixels)
2) VGA mode (640 x 480)
XGA (1024 x 768)
Horizontal : x 1.6 (1024 pixels) Vertical : x 1.6 (768 pixels)
3) PC9801 mode (640 x 400)
XGA (1024 x 768)
Black display area
Horizontal : x 1.6 (1024 pixels) Vertical : x 1.6 (640 pixels)
4) VGA text mode (720 x 400)
XGA (1024 x 768)
Black display area
Horizontal : x 1.4 (1008 pixels) Vertical : x 1.6 (640 pixels)
5) 832 x 624 MAC mode (832 x 624)
XGA (1024 x 768)
Black display area
Horizontal : x 1.2 (998 pixels) Vertical : x 1.2 (748 pixels)
24
Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
COLOR CONTROL FUNCTION AND GRAPH IMAGE This LCD module can adjust the following functions by serial data input (table.1) (1) Main contrast: (2) Sub-contrast R/G/B: (3) Sub-brightness R/G/B: (1) Main contrast This function adjusts R/G/B contrast at the same time. Contrast control the amplitude of input video signal. Default value Valid range Contrast minimum Contrast maximum : 128 : 78 to 198 : 198 : 78 See table 9, 10 and Color control function and graph image
ADJSEL = "H" or "Open": Maincontrast = 128 (2) Sub-contrast R, G, B Sub-contrast can be adjusted for each R/G/B. Contrast control the amplitude of input video signal. Default value Valid range Contrast minimum Contrast maximum : 128 : 78 to 198 : 78 : 198
ADJSEL = "H" or "Open": Sub-contrast R.G.B = 128 (3) Sub-brightness R, G, B Sub-brightness can be adjusted for each R/G/B. Brightness adjust the black level of input video signal. Default value Valid range Brightness minimum Brightness maximum : 128 : 55 to 163 : 55 : 163
ADJSEL = "H" or "Open": Sub-brightness R.G.B = 128 Notes 1. Setting these values out of proper ranges may cause deterioration of LCD. Keep the values in valid ranges. 2. Difference between each LCD module may be seen even if the values for the functions are the identical. Moreover, optical characteristics are affected by this function. A sufficient evaluation to adopt this function is recommended.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
* Main contrast & Sub contrast
Relative luminance 1 Relative luminance 1 Relative luminance 1
0 Black Gray scale White
0 Black Gray scale White
0 Black Gray scale White
Main contrast max. Sub contrast max.
DEFAULT
min.
DEFAULT
min.
* Sub brightness
Relative luminance 1 Relative luminance 1 Relative luminance 1
0 Black Gray scale White
0 Black Gray scale White
0 Black Gray scale White
Sub brightness min.
DEFAULT
max.
26
Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
OSD FUNCTION OSD (On Screen Display) is a function to display other digital data on analog data. Possible to display 1 bit data for each R/G/B color (8 colors). OSD is valid for the period of OSDENI. OSDRI, OSDGI, OSDBI: digital data for OSD OSDENI = "H" OSDENI = "L" : OSD signal is valid : OSD signal is not valid
OSD is a sub-display for function-control and the display quality is not guaranteed. Please adopt the OSD image under sufficient evaluation of display quality.
Analog R, G, B
OSDENI
OSDRI, GI, BI
Real display image
Note Regarding the use of OSD, please note that there is possibility of conflicts with a patent in Europe and the U.S. Thus, if such conflict might happen when you use OSD, we shall not be responsible for any trouble.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
OUTSIDE CONTROL FOR LUMINANCE Outside control is valid when PWSEL = "L" and BRTP signal is inputted. Luminance can be controlled by the duty value of input signal for BRTP. Duty = 100%: Luminance is maximum. Duty = 20% : Luminance is minimum. Timing for BRTP
tPW tHPW VIH 50 % VIL tLPW
BRTP
Parameter Frequency Pulse-width
Symbol 1/tPW tHPW/tPW VIL
Min. 185 20 - 4.5
Typ. - - - -
Max. 340 100 0.6 -
Unit Hz % V V
Remark - at max. luminance (100%) - -
Input voltage VIH
Regarding set up for the frequency, please refer to following method. Set up the frequency = Vsync frequency x (n + 0.25) or (n + 0.75) Please adopt the frequency under sufficient evaluation of display quality because the display may be disturbed depending on a frequency.
28
Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
INPUT SIRIAL TIMING XGA MODE (STANDARD)
Name CLK Frequency Symbol 1/tc Min. 52.0 - - 0.4 16.0 - - - - 10 - 16 1.0 44 1.8 Typ. 65.0 15.385 - 0.5 20.677 1344 15.754 1024 0.369 24 2.092 136 2.462 160 - Max. 80.0 - 10 0.6 22.7 - - - - - - - - - - Unit MHz ns ns - Remark XGA standard
Rise/Fall Pulse-width Hsync Period
tcrf tcl/tc th
- - 48.363 kHz (typ.)
s CLK s CLK s CLK s CLK s CLK s
Display
thd
-
Front-porch
thf
-
Pulse-width
thp
-
Back-porch
thb
Note
Pulse-width + Back-porch Vsync - Hsync timing
thbp
-
thvh thvs
3 1 - 13.3 - - - - 1 - 2 - 5 4
- - - 16.665 806 15.880 768 62.031 3 124.06 6 599.63 29 -
- - 10 18.5 - - - - - - - - - -
CLK CLK ns ms H
- - - 60.004 Hz (typ.)
Rise/Fall Vsync Period
thrf tv
Display
tvd
s H s H s H s H
ns
-
Front-porch
tvf
-
Pulse-width
tvp
-
Back-porch
tvb
-
Analog R, G, B
-
tda
-
Note Back-porch (thb) must exceed both 1.0 s and 44 CLK.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
tv tvp
Vsync tvb tvd tvf
Display period
th thp
Hsync thb thpb Display period thd thf
Vsync
VIL
thvh
thvs
Hsync thrf
VIH VIL
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
TIMING FOR GENERATING CLAMP SIGNAL INTERNALLY
Hsync Display period tA CLAMP tB
MOD1 0 0 1 1
MOD2 0 1 0 1
tA [CLK] Prohibit 2
tB [ns]
27 20 15
Note Exclude noises on analog R, G, B signal. Analog R, G, B signals are the black level reference during CLAMP = "L". If noises are on the analog signals, luminance level of display is changed and the image quality of the display may be worse. TIMING FOR INPUTING CLAMP SIGNAL EXTERNALLY
Hsync Display period tA CLAMP tB tC
Item tA tB tC
Min. 0.1 0.3 0.2
Typ. - - -
Max. - - -
Unit
Remarks - - -
s s s
Note Exclude noises on analog R, G, B signal. Analog R, G, B signals are the black level reference during CLAMP = "L". If noises are on the analog signals, luminance level of display is changed and the image quality of the display may be worse.
Data Sheet EN0416EJ1V0DS00
31
NL10276AC30-03
INPUT SIGNAL AND DISPLAY POSITION XGA standard timing Pixels
D (0, 0) D (1, 0) D (2, 0) * * * * D (767, 0) D (0, 1) D (1, 1) D (2, 1) * * * * D (767, 1) D (0, 2) D (1, 2) D (2, 2) * * * * D (767, 2) *** *** *** *** * * * * *** *** *** *** D (0, 1023) D (1, 1023) D (2, 1023) * * * * D (767, 1023)
tvp
tvb
Vsync 1 line Hsync 0 XGA mode 1 (CNTSEL = "H" or "Open") R G B 2 3 4 5 6 7 *** 35 36 37
Invalid
Valid D(0,X) D(1,X) D(2,X)
thp
thb
Hsync
1clk
CLK 0 1 XGA mode (CNTSEL = "H" or "Open") R G B 2 *** 136 137 138 *** 296 297 tda Invalid Valid D(X,0) D(1,X) D(2,X)
Note tda should be minimum 4 ns.
32
Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
OPTICAL CHARACTERISTICS (Ta = 25C, VDD = 12 V, VDDB = 12 V) Note 1
Item Contrast ratio Luminance Luminance uniformity Symbol CR Lvmax - Condition Perpendicular White White Min. 80 150 - Typ. 200 200 - Max. - - 1.30 Unit - cd/m -
2
Remark Note 2 - Note 3
Reference data (Ta = 25C, VDD = 12 V, VDDB = 12 V) Note 1
Item Contrast ratio Viewing angle range Symbol CR Condition Highest contrast ratio at D = 10 CR > 10, U = 0, D = 0 Min. - 50 50 CR > 10, R = 0, L = 0 35 30 at center, to NTSC Maximum luminance: 100% white to black black to white 35 - - - Typ. 350 55 55 50 45 42 20 to 100 Max. - - - - - - - Unit - deg. deg. deg. deg. % % - - Remark Note 2 Note 4
R L U D
Color gamut Luminance control range Response time
C -
Ton Toff
15 40
40 50
ms ms
Note 5 Note 5
Notes 1.
The luminance is measured at 20 minutes after power on, with all pixels in "white". The typical value is measured after luminance saturation. Display mode Contrast : VESA XGA-75 Hz : Default value RGB input voltage: 0.7 Vp-p
2. The contrast ratio is calculated using the following formula. Luminance with all pixels in "white" Luminance with all pixels in "black"
50 cm Photo-detector (BM-5A)
Contrast ratio (CR) =
1 LCD module
Data Sheet EN0416EJ1V0DS00
33
NL10276AC30-03
3. Luminance uniformity is calculated using the following formula. Maximum luminance Minimum luminance
Luminance uniformity =
The luminance is measured near five points shown below.
Column 171 512
853
Row
1 3 4
2
128 384
5
640
4. Definitions of viewing angle are as follows.
Normal
L U
12 o'clock
R
-x +y
D
-y
+x
5. Definitions of response time is as follows. Photo-detector output signal is measured when the luminance changes "white" to "black" and "black" to "white". Response time are Ton and Toff of the photo-detector output amplitude. Ton is the time between 100% and 10%. Toff is the time between 0% and 90%.
100 % White
90 %
Luminance
Black 0% Ton
10 % Toff
34
Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
RELIABILITY TEST
Test item High temperature/humidity operation Test condition 50 2C, 85% relative humidity 240 hours, Display data is black. <1> 0C 3C *** 1 hour 55C 3C *** 1 hour <2> 50 cycles, 4 hours/cycle <3> Display data is black. <1> -20C 3C *** 30 minutes 60C 3C *** 30 minutes <2> 100 cycles <3> Temperature transition time is within 5 minutes. <1> 5-100 Hz, 2 G 1 minute/cycle, X, Y, Z direction <2> 50 times each direction <1> 55 G, 11 ms X, Y, Z direction <2> 3 times each direction 150 pF, 150 , 10 KV 9 places on a panel 10 times each place at one-second intervals Dust (operation) 15 kinds of dust (JIS Z 8901) Hourly 15 seconds stir, 8 times repeat Note 1 Note 1 Judgment
Heat cycle (operation)
Note 1
Thermal shock (non-operation)
Note 1
Vibration (non-operation)
Notes 1, 2
Mechanical shock (non-operation)
Notes 1, 2
ESD (operation)
Note 1 Note 3
Notes 1. Display function is checked by the same condition as LCD module out-going inspection. 2. Physical damage. 3. Discharge points are shown in the figure.
Data Sheet EN0416EJ1V0DS00
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NL10276AC30-03
Next figures and sentences are very important. Please understand these, then read the text of a book.
This figure is a mark that you will get hurt and/or the module will have damages when you make a mistake to operate.
CAUTION
This figure is a mark that you will get an electric shock when you make a mistake to operate.
This figure is a mark that you will get hurt when you make a mistake to operate
CAUTION
Do not touch an inverter-on which is stuck a caution label-while LCD module is under operation, because of dangerous high voltage.
(1) Caution when taking out the module <1> Pick the pouch only, in taking out module from a carrier box. (2) Caution for handling the module <1> As the electrostatic discharges may break LCD modules, handle LCD modules with care against electrostaic discharges. <2> As LCD panels and backlight elements are made from fragile glass material, impulse and pressure to LCD modules should be avoided. <3> As the surface of polarizer is very soft and easily scratched, use soft dry cloth without chemicals for cleaning. <4> Do not pull the interface connectors in or out while LCD module is operating. <5> Put modules display side down on a flat horizontal plane. <6> Handle connectors and cables with care. <7> The torque of mounting screw should be 0.392 N*m (4 kgf*cm) or less. (3) Caution for the atmosphere <1> Dew drop atmosphere should be avoided. <2> Do not store and/or operate LCD modules in a high temperature and/or highly humid atmosphere. Storage in an electro-conductive polymer packing pouch and under relatively low temperature atmosphere is recommended. <3> This module uses cold cathode fluorescent lamps. Therefore, the life time of lamps becomes short conspicuously at low temperature. <4> Do not operate LCD modules in a high magnetic field. (4) Caution for the module characteristics <1> Do not apply fixed pattern data signal to the LCD module at product aging. Applying fixed pattern for a long time may cause image sticking. (5) Other cautions <1> Do not disassemble and/or reassemble LCD modules. <2> Do not readjust variable resistor or switch etc. <3> When returning modules for repair or etc., please pack the module not to be broken. We recommend the original shipping packages.
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Data Sheet EN0416EJ1V0DS00
NL10276AC30-03
Liquid Crystal Display has the following specific characteristics. They are not defects or malfunctions. The display conditions of LCD modules may be affected by the ambient temperature. The LCD module uses cold cathode tubes for backlight. Optical characteristics, like luminance or uniformity, will change during time. Uneven brightness and/or small spots may be noticed depending on different display patterns.
Data Sheet EN0416EJ1V0DS00
37
2 5 0.3
10 0.3 2
4
2
304.128 (ACTIVE AREA) 2 170 0.7 6 0.3
6 0.3
2
ACTIVE AREA CENTER
2
197
228.096 (ACTIVE AREA)
97.8 0.7
8-R4.4
8 0.2 2 5
2
50.3 2
NL10276AC30-03
* The torque to mounting screw should never exceed 0.392N * m (4 kg * cm) * The tolerance of the dimensions that are not shown is 0.5 mm.
31 0.3
6 0.3
2
2
6 0.3
2 50.3
5
18.6 0.3
232.7 0.3 (BEZEL OPENING)
Data Sheet EN0416EJ1V0DS00
204 0.3
212 0.3
265 0.6
38
350 0.6 340 0.3 20.5 Max 15.6 0.3 5 0.2 4-2.7 0.3 4-3.4 0.3 308.8 0.3 (BEZEL OPENING)
OUTLINE DRAWINGS
FRONT VIEW (Unit in mm)
4- 3.5 0.1
3
20.5 Max
5.5
86.2 0.2 9.4 20.5 Max 13.5 104.8 23.8 1 R8 M3BR (b)
54 0.2
31 0.2
48.6 0.2
62.8
REAR VIEW
27 1
R8
8.7
8.7
6.5
6.7 13.4
2.2
20 5
85.7
71
THE TFT COLOR LCD PANEL CONTAINS COLD CATHODE FLOURESCEST LAMPS. PLEASE FOLLOW LOCALORDINANCES OR REGULATIONS FOR ITS DISPOSAL
3.1 0.2
1
152
115 111
OUTLINE DRAWING (Unit in mm)
126.8 1
106.8 1
20.2
10
1
32.5
6 45
8.6
6
19
231
189 1 154 1
138
CN1: 14 1 MFR03-6R-SMT CN2: AMPSLIM-14P
5
218
7.6
232.5 139.8 1 130
CN201 CN202
7.6
15
11
65
1
1
CN4: DF14A-205
CN3: IL-Z-15P
37 1
35.8 1 40.7 1 22
Material Information Light guide: >PMMA<
0.4 0.2
NL10276AC30-03
MADE IN JAPAN
20
59 1
5
4
53
80
11.8 13.4 * The tolerance of the dimensions that are not shown is 0.5 mm.
14.7
35.7
Data Sheet EN0416EJ1V0DS00
10.5
76
78
A1000A763003
10.6
NL10276AC30-03
39
NL10276AC30-03
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its electronic components, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC electronic component, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
DATA SHEET

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